Chifzilla and its partner in the manufacture of H-NAND Sheds more light on their stacked chip technology - with the promise of two- and three-fold volumes from everything we know today very soon
In November 2014 vWe unveiled for the first time Intel's and Micron's 3D stacked chip technology, Which promised to provide us with unprecedented volumes, at unprecedented prices and with performance and reliability at the highest levels, or in short - to significantly shock everything we knew and knew in the field of storage.
Now, the two major manufacturers are solemnly announcing that they have begun producing samples of the new chips for their partnerships - and are taking advantage of the event to reveal to us some more interesting information.
First of all, the new chips of Intel And Mikron will be based on an architecture with four levels of control (a kind of logical division of a chip into a number of areas with independent and simultaneous control and action), which should enable significantly improved performance against a two-level architecture,SSD Today that are based on "simple" planar chips.
As part of the performance, the 3-D chips will include a much larger amount of electrons per cell storage Chip compared to modern planar technologies - which should also contribute to improved capabilities and performance, while substantially improving the reliability and longevity of the drives that will be based on those chips.
Another element in the Intel and Micron XNUMXD chips will be based on the floating gate technology for the application of each storage compartment across the chip - this compared to The main competitor Samsung that has chosen a newer technology Of Charge Trap for its 3-D chips. Floating gates comprise Technology And Intel-Micron declare that the extensive knowledge accumulated over the years when using this method will enable the new memories to be characterized by better production output, which will eventually bring a more attractive price for consumers. In general, one of the key points of 3D stacked chip technology is a price that will be competitive with today's technologies in larger relative volumes and / or in a smaller physical area.
For dessert, we already know that the first generation of three-dimensional chips Intel-Micron will include 32 layers that will compromise a storage volume of 256 GB in a single chip using the MLC method (a pair of bits per storage compartment), and a storage volume of 384 GB in a single chip in the TLC method (three bits per cell Storage) - when the practical meaning is a doubling to two and a half times the number of bits compressed in a given space cell compared to the most innovative planar technologies currently on the market, and this fact opens the door to volumes in volumes we have not yet known. About two terabytes of information on a 1.8-inch drive, about three or three and a half terabytes of storage volume on a full-length M.2 drive - and up to ten terabytes (!!) of storage on a 2.5-inch drive, when for server-world applications And high-performance computing is also about dozens of terabytes of physical volume similar to that of hard drive A single 3.5-inch mechanic.
The 2016D chips in question will only reach real commercial production in a few months, so we will probably see practical products that are only used in early XNUMX - but when that finally happens, it seems that it will certainly be possible to call it Sunday In a new and promising era for the world of hardware and computers as a whole.